Design Linked Incentive (DLI) Scheme: Catalysing India’s Semiconductor Design Ecosystem

Design Linked Incentive (DLI) Scheme: Catalysing India’s Semiconductor Design Ecosystem

Introduction

Semiconductors are the backbone of modern economies, powering sectors such as defence, space, telecommunications, healthcare, transport, AI and digital infrastructure. While semiconductor manufacturing is capital-intensive and geographically concentrated, chip design is the most value-intensive segment, accounting for up to 50% of value addition, 20–50% of Bill of Materials (BoM), and 30–35% of global semiconductor sales through the fabless model. Recognising this strategic reality, India has prioritised semiconductor design as a core pillar of its self-reliance strategy.

Rationale for Focusing on Chip Design

• Design and IP ownership determine product intelligence, security and competitiveness.
• Fabless design offers high value addition with relatively low capital expenditure.
• Manufacturing without indigenous design perpetuates import dependence for core technologies.
• A strong fabless ecosystem:
  1. Retains intellectual property within the country
  2. Reduces strategic vulnerabilities
  3. Attracts downstream manufacturing
  4. Enables long-term technological leadership

Design Linked Incentive (DLI) Scheme

The Design Linked Incentive (DLI) Scheme is implemented by the Ministry of Electronics and Information Technology (MeitY) under the Semicon India Programme to catalyze a strong, self-reliant chip design ecosystem by providing financial incentives and access to advanced design infrastructure for domestic startups and MSMEs.

Objectives

• Promote indigenous semiconductor IP and chip design
• Reduce import dependence
• Strengthen supply-chain resilience
• Enhance domestic value addition
• Support transition from design to deployment

Eligibility Framework

• Startups: Defined as per DPIIT notification (19 February 2019)
• MSMEs: Defined as per MSME notification (1 June 2020)
• Domestic companies: Owned by resident Indian citizens (FDI Policy Circular, 2017 or extant norms.)
• Eligible entities can design: The DLI Scheme supports semiconductor design across the full lifecycle—from design and development to deployment—
  • Integrated Circuits (ICs)
  • Chipsets
  • Systems-on-Chip (SoCs)
  • Systems and IP cores (Intellectual Property cores)
  • Semiconductor-linked designs

Incentive Structure under DLI

1. Product Design Linked Incentive

• Reimbursement of up to 50% of eligible expenditure.
• The reimbursement is capped at ₹15 crore per application.
• The support is available to entities involved in semiconductor design for: Integrated Circuits (ICs) Chipsets Systems on Chips (SoCs) Systems & IP Cores Semiconductor-linked designs.

2. Deployment Linked Incentive

• Incentives of 6% to 4% of net sales turnover are provided for five years.
• The incentive is capped at ₹30 crore per application.
• The minimum cumulative net sales required over Years 1–5 is 1 crore for startups/ ₹ MSMEs and 5 crore for other domestic companies.
• The design must be successfully deployed in electronic products

Design Infrastructure Support

• To democratise access to advanced chip design infrastructure, Centre for Development of Advanced Computing (C-DAC) has established the ChipIN Centre under DLI.
• Support includes:
  • National EDA Tool Grid: Remote access to the centralized facility of advance EDA tools for chip design activities will be provided to start-ups and MSMEs.
  • IP Core Repository: Flexible access to the repository of IP Cores for SoC design activities.
  • MPW prototyping support: Fiscal support for fabricating the design in MPW manner at semiconductor foundries.
  • Post-silicon validation support: Fiscal support for testing and validation of the fabricated ASIC and silicon bring-up activities.

Design Linked Incentive Scheme – Programme Highlights, Achievements and Outcomes:

• Since its launch in December 2021, the Design Linked Incentive (DLI) Scheme has been instrumental in shaping a stronger and more self-reliant semiconductor design ecosystem in India.
• A key pillar of this infrastructure is the ChipIN Centre, which has democratized access to advanced EDA tools for chip design for about 1 lakh engineers and students across 400 organizations nationwide—making it the world’s largest user base of a centralized chip design facility.
• This includes support to around 305 academic institutions under the Chips to Start-up (C2S) Programme and 95 startups under the DLI Scheme, significantly reducing entry barriers for early-stage innovators.
• Complementing this effort, India’s shared EDA Grid—a national platform offering high-end chip design software—has recorded 54,03,005 hours of cumulative usage by 95 supported start-ups as of 2nd January 2026, reflecting strong adoption by startups, MSMEs, and researchers across all States.
• These enabling measures have translated into tangible outcomes for the domestic startup ecosystem. Supported companies under the DLI Scheme have moved from innovation to execution, with-
  • 16 chip designed tape-outs completed
  • 6 semiconductor chips successfully fabricated
  • 10 patents filed
  • Beneficiaries have also developed 140+ reusablesemiconductor IP cores
  • 1,000 specialised engineers have been trained or engaged through DLI-supported projects
  • 24 chip-design projects have been sanctioned across areas such as video surveillance, drone detection, energy meters, microprocessors, satellite communications, and broadband and IoT SoCs.

Institutional Ecosystem Supporting DLI

Ministry of Electronics and Information Technology (MeitY): 

• MeitY leads national semiconductor initiatives, provides policy direction, and anchors schemes.
• It also coordinates institutional and industry partnerships to strengthen India’s chip design and manufacturing ecosystem.
• MeitY has announced the Design Linked Incentive (DLI) Scheme; aims to offset the existing disabilities in India’s domestic semiconductor design industry.
• It seeks to help Indian companies move up the semiconductor value chain.

Semicon India Programme

• With an outlay of ₹76,000 crore, the programme supports investments in semiconductor and display manufacturing as well as the design ecosystem.
• The DLI Scheme operates under this programme, ensuring end-to-end backing for design, fabrication and productisation.
• C-DAC, a premier R&D organization of the MeitY, is responsible for implementation of the DLI Scheme as Nodal Agency.

Chips-to-Startup (C2S) Programme

• C2S is an umbrella capacity building programme initiated at academic organizations spread across the country to generate 85 thousand number of industry-ready manpower at B.Tech, M.Tech, and PhD levels specialized in semiconductor chip design.

Microprocessor Development Programme

• The Microprocessor Development Programme, initiated at C-DAC, IIT Madras and IIT Bombay has resulted into design, development and fabrication of open-source architecture-based family of microprocessors viz. VEGA12, SHAKTI13 and AJIT microprocessors as a step towards self-reliance.

Strategic Significance

• Anchors India in the most strategic segment of the semiconductor value chain
• Reduces vulnerability to:
  • Geopolitical disruptions
  • Supply-chain shocks
• Ensures access to critical technologies for:
  • Defence
  • Telecom
  • AI
  • Mobility
• Converts deep-tech innovation into market-ready products
• Strengthens India’s position as a credible global chip design hub

Conclusion

The Design Linked Incentive (DLI) Scheme is critical to anchoring India in the most strategic and value-intensive segment of the global semiconductor value chain—chip design. By reducing dependence on imported semiconductor IPs and chips, strengthening resilience against geopolitical and supply-chain disruptions, and ensuring assured access to critical technologies for defence, telecom, AI and mobility, DLI lays the foundation for strategic autonomy and long-term economic growth. The scheme also enables high-value growth by translating deep-tech innovation into globally competitive products, fostering startups and MSMEs, and building a highly skilled engineering workforce.

These outcomes are already evident, with DLI-supported firms achieving multiple chip tape-outs, silicon-proven designs, patents, reusable IPs, trained talent and operational design infrastructure, demonstrating tangible on-ground impact. As the ecosystem enters the productization phase, silicon-validated designs are moving toward volume manufacturing, system integration and market deployment, positioning Indian companies as credible global suppliers while strengthening domestic supply chains and reinforcing India’s self-reliant semiconductor ecosystem.